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 Precision, Very Low Noise, Low Input Bias Current, Wide Bandwidth JFET Operational Amplifier AD8610/AD8620
FEATURES Low Noise 6 nV/Hz Low Offset Voltage: 100 V Max Low Input Bias Current 10 pA Max Fast Settling: 600 ns to 0.01% Low Distortion Unity Gain Stable No Phase Reversal Dual-Supply Operation: 5 V to 13 V APPLICATIONS Photodiode Amplifier ATE Instrumentation Sensors and Controls High Performance Filters Fast Precision Integrators High Performance Audio FUNCTIONAL BLOCK DIAGRAMS 8-Lead MSOP and SOIC (RM-8 and R-8 Suffixes)
NULL IN IN V 1 8
AD8610
4 5
NC V OUT NULL
NC = NO CONNECT
8-Lead SOIC (R-8 Suffix)
OUTA INA INA V 1 8
AD8620
4 5
V OUTB INB INB
GENERAL DESCRIPTION
The AD8610/AD8620 is a very high precision JFET input amplifier featuring ultralow offset voltage and drift, very low input voltage and current noise, very low input bias current, and wide bandwidth. Unlike many JFET amplifiers, the AD8610/AD8620 input bias current is low over the entire operating temperature range. The AD8610/AD8620 is stable with capacitive loads of over 1000 pF in noninverting unity gain; much larger capacitive loads can be driven easily at higher noise gains. The AD8610/AD8620 swings to within 1.2 V of the supplies even with a 1 k load, maximizing dynamic range even with limited supply voltages. Outputs slew at 50 V/s in either inverting or noninverting gain configurations, and settle to 0.01% accuracy in less than 600 ns. Combined with the high input impedance, great precision, and very high output drive, the
AD8610/AD8620 is an ideal amplifier for driving high performance A/D inputs and buffering D/A converter outputs. Applications for the AD8610/AD8620 include electronic instruments; ATE amplification, buffering, and integrator circuits; CAT/MRI/ultrasound medical instrumentation; instrumentation quality photodiode amplification; fast precision filters (including PLL filters); and high quality audio. The AD8610/AD8620 is fully specified over the extended industrial (-40C to +125C) temperature range. The AD8610 is available in the narrow 8-lead SOIC and the tiny MSOP8 surface-mount packages. The AD8620 is available in the narrow 8-lead SOIC package. MSOP8 packaged devices are available only in tape and reel.
REV. D
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 (c) 2004 Analog Devices, Inc. All rights reserved.
AD8610/AD8620-SPECIFICATIONS (@ V =
S
5.0 V, VCM = 0 V, TA = 25 C, unless otherwise noted.)
Min Typ 45 80 45 80 85 90 150 +2 +130 +1.5 +1 +20 +40 95 180 0.5 0.5 0.8 4 -4 30 110 2.5 3.0 50 25 350 1.8 6 5 8 15 Max 100 200 150 300 250 350 850 +10 +250 +2.5 +10 +75 +150 +3 Unit V V V V V V V pA pA nA pA pA pA V dB V/mV V/C V/C V/C V V mA dB mA mA V/s MHz ns V p-p nV/Hz fA/Hz pF pF dB dB
Parameter INPUT CHARACTERISTICS Offset Voltage (AD8610B) Offset Voltage (AD8620B) Offset Voltage (AD8610A/AD8620A)
Symbol VOS
Conditions
-40C < TA < +125C VOS -40C < TA < +125C VOS +25C < TA < 125C -40C < TA < +125C Input Bias Current IB -40C < TA < +85C -40C < TA < +125C Input Offset Current IOS -40C < TA < +85C -40C < TA < +125C Input Voltage Range Common-Mode Rejection Ratio Large Signal Voltage Gain Offset Voltage Drift (AD8610B) Offset Voltage Drift (AD8620B) Offset Voltage Drift (AD8610A/AD8620A) OUTPUT CHARACTERISTICS Output Voltage High Output Voltage Low Output Current POWER SUPPLY Power Supply Rejection Ratio Supply Current/Amplifier DYNAMIC PERFORMANCE Slew Rate Gain Bandwidth Product Settling Time NOISE PERFORMANCE Voltage Noise Voltage Noise Density Current Noise Density Input Capacitance Differential Common-Mode Channel Separation f = 10 kHz f = 300 kHz
Specifications subject to change without notice.
CMRR AVO VOS/T VOS/T VOS/T VOH VOL IOUT PSRR ISY
VCM = -2.5 V to +1.5 V RL = 1 k, VO = -3 V to +3 V -40C < TA < +125C -40C < TA < +125C -40C < TA < +125C RL = 1 k, -40C < TA < +125C RL = 1 k, -40C < TA < +125C VOUT > 2 V VS = 5 V to 13 V VO = 0 V -40C < TA < +125C RL = 2 k AV = +1, 4 V Step, to 0.01% 0.1 Hz to 10 Hz f = 1 kHz f = 1 kHz
-10 -250 -2.5 -10 -75 -150 -2 90 100
1 1.5 3.5
3.8
-3.8
100
3.0 3.5
SR GBP tS en p-p en in CIN CS
40
137 120
-2-
REV. D
AD8610/AD8620 ELECTRICAL SPECIFICATIONS (@ V =
S
13 V, VCM = 0 V, TA = 25 C, unless otherwise noted.)
Conditions Min Typ 45 80 45 80 85 90 150 +3 +130 +1.5 +20 +40 110 200 0.5 0.5 0.8 Max 100 200 150 300 250 350 850 +10 +250 +3.5 +10 +75 +150 +10.5 Unit V V V V V V V pA pA nA pA pA pA V dB V/mV V/C V/C V/C
Parameter INPUT CHARACTERISTICS Offset Voltage (AD8610B) Offset Voltage (AD8620B) Offset Voltage (AD8610A/AD8620A)
Symbol VOS
-40C < TA < +125C VOS -40C < TA < +125C VOS +25C < TA < 125C -40C < TA < +125C Input Bias Current IB -40C < TA < +85C -40C < TA < +125C Input Offset Current IOS -40C < TA < +85C -40C < TA < +125C Input Voltage Range Common-Mode Rejection Ratio Large Signal Voltage Gain Offset Voltage Drift (AD8610B) Offset Voltage Drift (AD8620B) Offset Voltage Drift (AD8610A/AD8620A) OUTPUT CHARACTERISTICS Output Voltage High Output Voltage Low Output Current Short Circuit Current POWER SUPPLY Power Supply Rejection Ratio Supply Current/Amplifier DYNAMIC PERFORMANCE Slew Rate Gain Bandwidth Product Settling Time NOISE PERFORMANCE Voltage Noise Voltage Noise Density Current Noise Density Input Capacitance Differential Common-Mode Channel Separation f = 10 kHz f = 300 kHz
Specifications subject to change without notice.
CMRR AVO VOS/T VOS/T VOS/T VOH VOL IOUT ISC PSRR ISY
VCM = -10 V to +10 V RL = 1 k, VO = -10 V to +10 V -40C < TA < +125C -40C < TA < +125C -40C < TA < +125C RL = 1 k, -40C < TA < +125C RL = 1 k, -40C < TA < +125C VOUT > 10 V
-10 -250 -3.5 -10 -75 -150 -10.5 90 100
1 1.5 3.5
+11.75 +11.84 V -11.84 -11.75 V 45 mA 65 mA 100 110 3.0 3.5 60 25 600 1.8 6 5 8 15 dB mA mA V/s MHz ns V p-p nV/Hz fA/Hz pF pF dB dB
VS = 5 V to 13 V VO = 0 V -40C < TA < +125C RL = 2 k AV = 1, 10 V Step, to 0.01% 0.1 Hz to 10 Hz f = 1 kHz f = 1 kHz
3.5 4.0
SR GBP tS en p-p en in CIN CS
40
137 120
REV. D
-3-
AD8610/AD8620
ABSOLUTE MAXIMUM RATINGS*
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27.3 V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VS-- to VS+ Differential Input Voltage . . . . . . . . . . . . . . . Supply Voltage Output Short-Circuit Duration to GND . . . . . . . . . . Indefinite Storage Temperature Range R, RM Packages . . . . . . . . . . . . . . . . . . . . . -65C to +150C Operating Temperature Range AD8610/AD8620 . . . . . . . . . . . . . . . . . . . . -40C to +125C Junction Temperature Range R, RM Packages . . . . . . . . . . . . . . . . . . . . . -65C to +150C Lead Temperature Range (Soldering, 10 sec) . . . . . . . . 300C
*Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Package Type 8-Lead MSOP (RM) 8-Lead SOIC (RN)
JA*
JC
Unit C/W C/W
190 158
44 43
*JA is specified for worst-case conditions; i.e., JA is specified for a device soldered in circuit board for surface-mount packages.
ORDERING GUIDE
Model AD8610AR AD8610AR-REEL AD8610AR-REEL7 AD8610ARM-REEL AD8610ARM-R2 AD8610ARZ* AD8610ARZ-REEL* AD8610ARZ-REEL7* AD8610BR AD8610BR-REEL AD8610BR-REEL7 AD8610BRZ* AD8610BRZ-REEL* AD8610BRZ-REEL7* AD8620AR AD8620AR-REEL AD8620AR-REEL7 AD8620BR AD8620BR-REEL AD8620BR-REEL7
*Pb-free part
Temperature Range -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C
Package Description 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC 8-Lead MSOP 8-Lead MSOP 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC
Package Option RN-8 RN-8 RN-8 RM-8 RM-8 RN-8 RN-8 RN-8 RN-8 RN-8 RN-8 RN-8 RN-8 RN-8 RN-8 RN-8 RN-8 RN-8 RN-8 RN-8
Branding
B0A B0A
CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD8610/AD8620 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
-4-
REV. D
Typical Performance Characteristics-AD8610/AD8620
14 VS = 12 13V
V
600 VS = 400
NUMBER OF AMPLIFIERS
INPUT OFFSET VOLTAGE -
18
13V
16 14 12 10 8 6 4 2
VS =
5V
NUMBER OF AMPLIFIERS
10 8 6 4 2 0 250 150 50 150 50 INPUT OFFSET VOLTAGE - V 250
200
0
200
400
600
40
25 85 TEMPERATURE - C
125
0 250 150 50 150 50 INPUT OFFSET VOLTAGE - V 250
TPC 1. Input Offset Voltage at 13 V
TPC 2. Input Offset Voltage vs. Temperature at 13 V (300 Amplifiers)
TPC 3. Input Offset Voltage at 5 V
600 VS =
V
14 5V 12 INPUT BIAS CURRENT - pA NUMBER OF AMPLIFIERS 10 8 6 4 2 0
0 0.2 0.6 1.0 1.4 1.8 2.2 2.6
3.6 VS = 5V OR 13V 3.4 3.2 3.0 2.8 2.6 2.4 2.2 2.0 10 TCVOS - V/ C VS = 13V
400
INPUT OFFSET VOLTAGE -
200
0
-200
-400
-600
-40
25 85 TEMPERATURE - C
125
0 5 10 5 COMMON-MODE VOLTAGE - V
TPC 4. Input Offset Voltage vs. Temperature at 5 V (300 Amplifiers)
TPC 5. Input Offset Voltage Drift
TPC 6. Input Bias Current vs. Common-Mode Voltage
3.0
3.05 VS = 13V
2.65 VS = 2.60
SUPPLY CURRENT - mA
5V
2.5 SUPPLY CURRENT - mA
SUPPLY CURRENT - mA
2.95
2.55 2.50 2.45 2.40 2.35
2.0
2.85
1.5
2.75
1.0
0.5
2.65
0
0
1
2
3 4 5 6 7 8 9 10 11 12 13 SUPPLY VOLTAGE - V
2.55 40 25 85 TEMPERATURE - C 125
2.30 40 25 85 TEMPERATURE - C 125
TPC 7. Supply Current vs. Supply Voltage
TPC 8. Supply Current vs. Temperature at 13 V
TPC 9. Supply Current vs. Temperature at 5 V
REV. D
-5-
AD8610/AD8620
1.8
4.25 VS = 13V
OUTPUT VOLTAGE HIGH - V
3.95 VS = 5V RL = 1k
OUTPUT VOLTAGE LOW - V
OUTPUT VOLTAGE TO SUPPLY RAIL- V
1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2
4.20
4.00 4.05 4.10 4.15 4.20 4.25 4.30
VS = 5V RL = 1k
4.15
4.10
4.05
4.00
0 100
1k
10k 100k 1M RESISTANCE LOAD -
10M
100M
3.95 40 25 85 TEMPERATURE - C 125
40
25 85 TEMPERATURE - C
125
TPC 10. Output Voltage to Supply Rail vs. Load
TPC 11. Output Voltage High vs. Temperature at 5 V
TPC 12. Output Voltage Low vs. Temperature at 5 V
12.05
VS = 13V RL = 1k
11.80 VS = 13V RL = 1k
120 100 80 60 VS = 13V RL = 1k MARKER AT 27MHz M = 69.5 CL = 20pF
270 225 180
PHASE - Degrees
OUTPUT VOLTAGE HIGH - V
OUTPUT VOLTAGE LOW - V
12.00
11.85
135 90 45 0 45 90
11.90
GAIN - dB
11.95
40 20 0 20
11.90
11.95
11.85
12.00
40 60
135 180 1 10 FREQUENCY - MHz 100 200
11.80 40 25 85 TEMPERATURE - C 125
12.05
80
40 25 85 TEMPERATURE - C 125
TPC 13. Output Voltage High vs. Temperature at 13 V
TPC 14. Output Voltage Low vs. Temperature at 13 V
TPC 15. Open-Loop Gain and Phase vs. Frequency
60
CLOSED-LOOP GAIN - dB
40 G = 100
VS = 13V RL = 2k CL = 20pF
260 240 220 VS = 13V VO = 10V RL = 1k
190 180 170 160 VS = 5V VO = 3V RL = 1k
AVO - V/mV
20 G = 10 0 G=1 20
AVO - V/mV 25 85 TEMPERATURE - C 125
200 180 160 140 120
150 140 130 120 110 100 40
40 1k 10k 100k 1M 10M FREQUENCY - Hz 100M
100 40
25 85 TEMPERATURE - C
125
TPC 16. Closed-Loop Gain vs. Frequency
TPC 17. AVO vs. Temperature at 13 V
TPC 18. AVO vs. Temperature at 5 V
-6-
REV. D
AD8610/AD8620
160 140 120 100
PSRR - dB
160
122
VS = 5V
VS =
13V
140 120 100
121
+PSRR -PSRR
PSRR - dB
120
+PSRR -PSRR 60 40 20 0
60 40 20 0 -20 -40 100
PSRR - dB
60M
80
80
119
118
117
-20 -40 100
1k
10k 100k 1M FREQUENCY - Hz
10M 60M
1k
10k 100k 1M FREQUENCY - Hz
10M
116 40 25 85 TEMPERATURE - C 125
TPC 19. PSRR vs. Frequency at 13 V
TPC 20. PSRR vs. Frequency at 5 V
TPC 21. PSRR vs. Temperature
140 VS = 120 100 CMRR - dB 80 60 40 20 0 10 0V 100 1k 10k 100k 1M FREQUENCY - Hz 10M 60M TIME - 4 s/DIV
VOLTAGE - 300mV/DIV
13V
VOLTAGE - 300mV/DIV
VS = 13V VIN = 300mV p-p AV = 100 RL = 10k
VS = 13V VIN = 300mV p-p AV = 100 RL = 10k CL = 0pF VIN 0V 0V
0V VIN CH2 = 5V/DIV VOUT
VOUT CH2 = 5V/DIV
TIME - 4 s/DIV
TPC 22. CMRR vs. Frequency
TPC 23. Positive Overvoltage Recovery
TPC 24. Negative Overvoltage Recovery
1,000 VS = 13V VIN p-p = 1.8 V Hz VSY = 13V
100 90 80 VS = 13V
P-P VOLTAGE NOISE - 1 V/DIV
VOLTAGE NOISE DENSITY - nV/
100 ZOUT -
70 60 GAIN = 1 50 40 30 GAIN = 100 20 10 GAIN = 10
10
1 TIME - 1s/DIV 1 10 100 1k 10k 100k 1M FREQUENCY - Hz
0 1k
10k
100k 1M 10M FREQUENCY - Hz
100M
TPC 25. 0.1 Hz to 10 Hz Input Voltage Noise
TPC 26. Input Voltage Noise vs. Frequency
TPC 27. ZOUT vs. Frequency
REV. D
-7-
AD8610/AD8620
100 90 80 70 GAIN = 1 VS = 5V 2500 3000 40
SMALL SIGNAL OVERSHOOT - %
35 30 25 20 15
VS = 13V RL = 2k VIN = 100mV p-p
2000
ZOUT -
50 40 30 GAIN = 100 20 10 0 1k GAIN = 10
IB - pA
60
1500
1000
+OS 10 5 0
OS
500
0 10k 100k 1M FREQUENCY - Hz 10M 100M
0
85 25 TEMPERATURE - C
125
1
10
100 1k CAPACITANCE - pF
10k
TPC 28. ZOUT vs. Frequency
TPC 29. Input Bias Current vs. Temperature
TPC 30. Small Signal Overshoot vs. Load Capacitance
40
SMALL SIGNAL OVERSHOOT - %
35 30
VS = 5V RL = 2k VIN = 100mV
VOLTAGE - 5V/DIV
VS = 13V VIN = 14V AV = +1 FREQ = 0.5kHz VOLTAGE - 5V/DIV VIN
25 20 15 +OS 10 5 0 1 10 100 CAPACITANCE - pF 1k 10k OS
VOUT
VS = 13V VIN p-p = 20V AV = +1 RL = 2k CL = 20pF TIME - 1 s/DIV
TIME - 400 s/DIV
TPC 31. Small Signal Overshoot vs. Load Capacitance
TPC 32. No Phase Reversal
TPC 33. Large Signal Response at G = +1
VOLTAGE - 5V/DIV
VOLTAGE - 5V/DIV
VS = 13V VIN p-p = 20V AV = +1 RL = 2k CL = 20pF TIME - 400ns/DIV
VS = 13V VIN p-p = 20V AV = +1 RL = 2k CL = 20pF TIME - 400ns/DIV
VOLTAGE - 5V/DIV
VS = 13V VIN p-p = 20V AV = 1 RL = 2k CL = 20pF TIME - 1 s/DIV
TPC 34. +SR at G = +1
TPC 35. -SR at G = +1
TPC 36. Large Signal Response at G = -1
-8-
REV. D
AD8610/AD8620
VS = 13V VIN p-p = 20V AV = 1 RL = 2k SR = 50V/ s CL = 20pF
VOLTAGE - 5V/DIV
VS = 13V VIN p-p = 20V AV = 1 RL = 2k SR = 55V/ s CL = 20pF TIME - 400ns/DIV
VOLTAGE - 5V/DIV
TIME - 400ns/DIV
TPC 37. +SR at G = -1
TPC 38. -SR at G = -1
CS(dB) = 20 log (VOUT / 10
+13V 3 U1 V+ V- R4 -13V
VIN)
R1 20k R2 V- 5 2k V+ U2 6 7 2k 0
138 136 134 132
0
VIN 20V p-p
+ 2 - 0
2k
0
0
130
Figure 1. Channel Separation Test Circuit
FUNCTIONAL DESCRIPTION
CS - dB
128 126 124 122 120
SUPPLY CURRENT - mA
The AD8610/AD8620 is manufactured on Analog Devices, Inc.'s proprietary XFCB (eXtra Fast Complementary Bipolar) process. XFCB is fully dielectrically isolated (DI) and used in conjunction with N-channel JFET technology and trimmable thin-film resistors to create the world's most precise JFET input amplifier. Dielectrically isolated NPN and PNP transistors fabricated on XFCB have FT greater than 3 GHz. Low TC thin film resistors enable very accurate offset voltage and offset voltage tempco trimming. These process breakthroughs allowed Analog Devices' world class IC designers to create an amplifier with faster slew rate and more than 50% higher bandwidth at half of the current consumed by its closest competition. The AD8610 is unconditionally stable in all gains, even with capacitive loads well in excess of 1 nF. The AD8610B achieves less than 100 V of offset and 1 V/C of offset drift, numbers usually associated with very high precision bipolar input amplifiers. The AD8610 is offered in the tiny 8-lead MSOP as well as narrow 8-lead SOIC surfacemount packages and is fully specified with supply voltages from 5 V to 13 V. The very wide specified temperature range, up to 125C, guarantees superior operation in systems with little or no active cooling. The unique input architecture of the AD8610 features extremely low input bias currents and very low input offset voltage. Low power consumption minimizes the die temperature and maintains the very low input bias current. Unlike many competitive JFET amplifiers, the AD8610/AD8620 input bias currents are low even at elevated temperatures. Typical bias currents are less than 200 pA at 85C. The gate current of a JFET doubles every 10C resulting in a similar increase in input bias current over temperature. Special care should be given to the PC board layout to minimize leakage currents between PCB traces. Improper layout and board handling generates leakage current that exceeds the bias current of the AD8610/AD8620. REV. D -9-
0
50
100
150 200 FREQUENCY - kHz
250
300
350
Figure 2. AD8620 Channel Separation Graph
Power Consumption
A major advantage of the AD8610/AD8620 in new designs is the saving of power. Lower power consumption of the AD8610 makes it much more attractive for portable instrumentation and for high-density systems, simplifying thermal management, and reducing power supply performance requirements. Compare the power consumption of the AD8610/AD8620 versus the OPA627 in Figure 3.
8
7 OPA627 6
5
4
3 AD8610 2 -75 -50 -25 0 25 50 75 100 125
TEMPERATURE - C
Figure 3. Supply Current vs. Temperature
AD8610/AD8620
Driving Large Capacitive Loads
+5V 3 VIN = 50mV 2 4 -5V 2k 2k 2F 7
The AD8610 has excellent capacitive load driving capability and can safely drive up to 10 nF when operating with 5 V supply. Figures 4 and 5 compare the AD8610/AD8620 against the OPA627 in the noninverting gain configuration driving a 10 k resistor and 10,000 pF capacitor placed in parallel on its output, with a square wave input set to a frequency of 200 kHz. The AD8610 has much less ringing than the OPA627 with heavy capacitive loads.
VS = 5V RL = 10k CL = 10,000pF
Figure 6. Capacitive Load Drive Test Circuit
VS = 5V RL = 10k CL = 2 F
VOLTAGE - 20mV/DIV
TIME - 2 s/DIV
VOLTAGE - 50mV/DIV
TIME - 20 s/DIV
Figure 4. OPA627 Driving CL = 10,000 pF
VS = 5V RL = 10k CL = 10,000pF
Figure 7. OPA627 Capacitive Load Drive, AV = +2
VS = 5V RL = 10k CL = 2 F
VOLTAGE - 20mV/DIV
TIME - 2 s/DIV
VOLTAGE - 50mV/DIV
TIME - 20 s/DIV
Figure 5. AD8610/AD8620 Driving CL = 10,000 pF
Figure 8. AD8610/AD8620 Capacitive Load Drive, AV = +2
Slew Rate (Unity Gain Inverting vs. Noninverting)
The AD8610/AD8620 can drive much larger capacitances without any external compensation. Although the AD8610/AD8620 is stable with very large capacitive loads, remember that this capacitive loading will limit the bandwidth of the amplifier. Heavy capacitive loads will also increase the amount of overshoot and ringing at the output. Figures 7 and 8 show the AD8610/AD8620 and the OPA627 in a noninverting gain of +2 driving 2 F of capacitance load. The ringing on the OPA627 is much larger in magnitude and continues more than 10 times longer than the AD8610.
Amplifiers generally have a faster slew rate in an inverting unity gain configuration due to the absence of the differential input capacitance. Figures 9 through 12 show the performance of the AD8610 configured in a gain of -1 compared to the OPA627. The AD8610 slew rate is more symmetrical, and both the positive and negative transitions are much cleaner than in the OPA627.
-10-
REV. D
AD8610/AD8620
VS = 13V RL = 2k G = -1
VS = 13V RL = 2k G = -1
VOLTAGE - 5V/DIV
VOLTAGE - 5V/DIV
SR = 54V/ s
SR = 56V/ s
TIME - 400ns/DIV
TIME - 400ns/DIV
Figure 9. (+SR) of AD8610/AD8620 in Unity Gain of -1
VS = 13V RL = 2k G = -1
Figure 12. (-SR) of OPA627 in Unity Gain of -1
SR = 42.1V/ s
TIME - 400ns/DIV
The AD8610 has a very fast slew rate of 60 V/s even when configured in a noninverting gain of +1. This is the toughest condition to impose on any amplifier since the input common-mode capacitance of the amplifier generally makes its SR appear worse. The slew rate of an amplifier varies according to the voltage difference between its two inputs. To observe the maximum SR as specified in the AD8610 data sheet, a difference voltage of about 2 V between the inputs must be ensured. This will be required for virtually any JFET op amp so that one side of the op amp input circuit is completely off, maximizing the current available to charge and discharge the internal compensation capacitance. Lower differential drive voltages will produce lower slew rate readings. A JFETinput op amp with a slew rate of 60 V/s at unity gain with VIN = 10 V might slew at 20 V/s if it is operated at a gain of +100 with VIN = 100 mV. The slew rate of the AD8610/AD8620 is double that of the OPA627 when configured in a unity gain of +1 (see Figures 13 and 14).
VS = 13V RL = 2k G = +1
Figure 10. (+SR) of OPA627 in Unity Gain of -1
VS = 13V RL = 2k G = -1
VOLTAGE - 5V/DIV
VOLTAGE - 5V/DIV
SR = 54V/ s
VOLTAGE - 5V/DIV
SR = 85V/ s
TIME - 400ns/DIV TIME - 400ns/DIV
Figure 11. (-SR) of AD8610/AD8620 in Unity Gain of -1 Figure 13. (+SR) of AD8610/AD8620 in Unity Gain of +1
REV. D
-11-
AD8610/AD8620
VS = 13V RL = 2k G = +1
diodes greatly interfere with many application circuits such as precision rectifiers and comparators. The AD8610 is free from these limitations.
+13V 3 7
VOLTAGE - 5V/DIV
SR = 23V/ s
14V
V1
6
2 4 AD8610 -13V
0
Figure 16. Unity Gain Follower
No Phase Reversal
TIME - 400ns/DIV
Figure 14. (+SR) of OPA627 in Unity Gain of +1
The slew rate of an amplifier determines the maximum frequency at which it can respond to a large signal input. This frequency (known as full-power bandwidth, or FPBW) can be calculated from the equation: SR FPBW = (2 xVPEAK ) for a given distortion (e.g., 1%).
Many amplifiers misbehave when one or both of the inputs are forced beyond the input common-mode voltage range. Phase reversal is typified by the transfer function of the amplifier, effectively reversing its transfer polarity. In some cases, this can cause lockup and even equipment damage in servo systems, and may cause permanent damage or nonrecoverable parameter shifts to the amplifier itself. Many amplifiers feature compensation circuitry to combat these effects, but some are only effective for the inverting input. The AD8610/AD8620 is designed to prevent phase reversal when one or both inputs are forced beyond their input common-mode voltage range.
VIN
CH1 = 20.8Vp-p
0V
VOLTAGE - 10V/DIV
CH2 = 19.4Vp-p
VOUT
0V
VOLTAGE - 5V/DIV
0
TIME - 400 s/DIV
TIME - 400ns/DIV
Figure 17. No Phase Reversal
THD Readings vs. Common-Mode Voltage
Figure 15. AD8610 FPBW
Input Overvoltage Protection
When the input of an amplifier is driven below VEE or above VCC by more than one VBE, large currents will flow from the substrate through the negative supply (V-) or the positive supply (V+), respectively, to the input pins, which can destroy the device. If the input source can deliver larger currents than the maximum forward current of the diode (>5 mA), a series resistor can be added to protect the inputs. With its very low input bias and offset current, a large series resistor can be placed in front of the AD8610 inputs to limit current to below damaging levels. Series resistance of 10 k will generate less than 25 V of offset. This 10 k will allow input voltages more than 5 V beyond either power supply. Thermal noise generated by the resistor will add 7.5 nV/Hz to the noise of the AD8610. For the AD8610/AD8620, differential voltages equal to the supply voltage will not cause any problem (see Figure 15). In this context, it should also be noted that the high breakdown voltage of the input FETs eliminates the need to include clamp diodes between the inputs of the amplifier, a practice that is mandatory on many precision op amps. Unfortunately, clamp
Total harmonic distortion of the AD8610/AD8620 is well below 0.0006% with any load down to 600 . The AD8610/AD8620 outperforms the OPA627 for distortion, especially at frequencies above 20 kHz.
0.1 VSY = 13V VIN = 5V rms BW = 80kHz
0.01
THD+N - %
OPA627
0.001 AD8610
0.0001 10
100
1k FREQUENCY - Hz
10k
80k
Figure 18. AD8610 vs. OPA627 THD + Noise @ VCM = 0 V
-12-
REV. D
AD8610/AD8620
0.1 VSY = 13V RL = 600 1.0k 1.2k
SETTLING TIME - ns
800
THD + N - %
2V rms 0.01 4V rms
600
400 OPA627 200
6V rms
0.001 10
100
1k FREQUENCY - Hz
10k
20k
0 0.001
0.01
0.1 ERROR BAND - %
1
10
Figure 19. THD + Noise vs. Frequency
Noise vs. Common-Mode Voltage
Figure 21. OPA627 Settling Time vs. Error Band
AD8610 noise density varies only 10% over the input range as shown in Table I.
Table I. Noise vs. Common-Mode Voltage
The AD8610/AD8620 maintains this fast settling when loaded with large capacitive loads as shown in Figure 22.
3.0 ERROR BAND 2.5 0.01%
VCM at F = 1 kHz (V) -10 -5 0 +5 +10
Settling Time
Noise Reading (nV/Hz)
s SETTLING TIME -
7.21 6.89 6.73 6.41 7.21
2.0
1.5
1.0
The AD8610 has a very fast settling time, even to a very tight error band, as can be seen from Figure 20. The AD8610 is configured in an inverting gain of +1 with 2 k input and feedback resistors. The output is monitored with a 10 x, 10 M, 11.2 pF scope probe.
1.2k
0.5
0.0
0
500
1000 CL - pF
1500
2000
Figure 22. AD8610 Settling Time vs. Load Capacitance
3.0
1.0k
ERROR BAND 2.5
0.01%
SETTLING TIME - ns
800
s
600
SETTLING TIME -
0.01 0.1 ERROR BAND - % 1 10
2.0
1.5
400
1.0
200
0.5
0 0.001
0.0
Figure 20. AD8610 Settling Time vs. Error Band
0
500
1000 CL - pF
1500
2000
Figure 23. OPA627 Settling Time vs. Load Capacitance
Output Current Capability
The AD8610 can drive very heavy loads due to its high output current. It is capable of sourcing or sinking 45 mA at 10 V output. The short circuit current is quite high and the part is capable of sinking about 95 mA and sourcing over 60 mA while operating with
REV. D
-13-
AD8610/AD8620
supplies of 5 V. Figures 24 and 25 compare the load current versus output voltage of AD8610/AD8620 and OPA627.
10
Programmable Gain Amplifier (PGA)
DELTA FROM RESPECTIVE RAIL - V
1
VEE VCC
The combination of low noise, low input bias current, low input offset voltage, and low temperature drift make the AD8610 a perfect solution for programmable gain amplifiers. PGAs are often used immediately after sensors to increase the dynamic range of the measurement circuit. Historically, the large ON resistance of switches, combined with the large IB currents of amplifiers, created a large dc offset in PGAs. Recent and improved monolithic switches and amplifiers completely remove these problems. A PGA discrete circuit is shown in Figure 27. In Figure 27, when the 10 pA bias current of the AD8610 is dropped across the (<5 ) RON of the switch, it results in a negligible offset error. When high precision resistors are used, as in the circuit of Figure 27, the error introduced by the PGA is within the 1/2 LSB requirement for a 16-bit system.
0.1 0.00001
0.0001
0.001 0.01 LOAD CURRENT - A
0.1
1
+5V
Figure 24. AD8610 Dropout from 13 V vs. Load Current
10
VIN
100
AD8610
U10
5
VOUT
DELTA FROM RESPECTIVE RAIL - V
10k
VCC VEE 1
5pF +5V 12 VL 1 IN1
-5V +5V 13 VDD
S1
3
1k G=1
D1
2 14
10k
ADG452
G
0.1 0.00001 0.0001 0.001 0.01 LOAD CURRENT - A 0.1 1
S2
Y0 Y1 Y2 Y3
16
IN2 D2 S3 15 11
G = 10 1k
A0 A1
A B
Figure 25. OPA627 Dropout from 15 V vs. Load Current
74HC139
9
IN3 D3 S4 10 6 100
G = 100
Although operating conditions imposed on the AD8610 ( 13 V) are less favorable than the OPA627 (15 V), it can be seen that the AD8610 has much better drive capability (lower headroom to the supply) for a given load current. The AD8610 maximum operating voltage is specified at 13 V. When 13 V is not readily available, an inexpensive LDO can provide 12 V from a nominal 15 V supply.
Input Offset Voltage Adjustment Operating with Supplies Greater than 13 V
8
IN4 VSS GND 4 -5V 5 D4 7 11
G = 1000
Figure 27. High Precision PGA
1. Room temperature error calculation due to RON and IB:
Offset of AD8610 is very small and normally does not require additional offset adjustment. However, the offset adjust pins can be used as shown in Figure 26 to further reduce the dc offset. By using resistors in the range of 50 k, offset trim range is 3.3 mV.
+VS 7 2
VOS Total Total Total
= I B x RON = 2 pA x 5 = 10 pV Offset = AD8610 (Offset ) + VOS Offset = AD8610 (Offset _ Trimmed ) + VOS Offset = 5 V + 10 pV 5 V
2. Full temperature error calculation due to RON and IB:
VOS (@ 85C) = I B (@ 85C) x RON (@ 85C) =
AD8610
6 1 5 R1 4 VOUT
3
250 pA x 15 = 3.75 nV
3. Temperature coefficient of switch and AD8610/AD8620 combined is essentially the same as the TCVOS of the AD8610: VOS /T (total ) = VOS /T ( AD8610 ) + VOS /T ( I B x RON ) VOS /T (total ) = 0.5 V/ C+ 0.06 nV/ C 0.5 V/ C -14- REV. D
-VS
Figure 26. Offset Voltage Nulling Circuit
AD8610/AD8620
High Speed Instrumentation Amplifier (IN AMP)
The three op amp instrumentation amplifiers shown in Figure 28 can provide a range of gains from unity up to 1,000 or higher. The instrumentation amplifier configuration features high commonmode rejection, balanced differential inputs, and stable, accurately defined gain. Low input bias currents and fast settling are achieved with the JFET input AD8610/AD8620. Most instrumentation amplifiers cannot match the high frequency performance of this circuit. The circuit bandwidth is 25 MHz at a gain of 1, and close to 5 MHz at a gain of 10. Settling time for the entire circuit is 550 ns to 0.01% for a 10 V step (gain = 10). Note that the resistors around the input pins need to be small enough in value so that the RC time constant they form in combination with stray circuit capacitance does not reduce circuit bandwidth.
V+ VIN1
In active filter applications using operational amplifiers, the dc accuracy of the amplifier is critical to optimal filter performance. The amplifier's offset voltage and bias current contribute to output error. Input offset voltage is passed by the filter, and may be amplified to produce excessive output offset. For low frequency applications requiring large value input resistors, bias and offset currents flowing through these resistors will also generate an offset voltage. At higher frequencies, an amplifier's dynamic response must be carefully considered. In this case, slew rate, bandwidth, and openloop gain play a major role in amplifier selection. The slew rate must be both fast and symmetrical to minimize distortion. The amplifier's bandwidth, in conjunction with the filter's gain, will dictate the frequency response of the filter. The use of a high performance amplifier such as the AD8610/AD8620 will minimize both dc and ac errors in all active filter applications.
Second-Order Low-Pass Filter
1/2 AD8620
U1
V- C5 10pF V+ R1 1k
Figure 29 shows the AD8610 configured as a second-order Butterworth low-pass filter. With the values as shown, the corner frequency of the filter will be 1 MHz. The wide bandwidth of the AD8610/AD8620 allows a corner frequency up to tens of megaHertz. The following equations can be used for component selection:
R1 = R2 = User Selected (Typical Values: 10 k - 100 k )
VOUT
R4 2k
C1 = C2 =
R7 2k
C4 15pF
AD8610
U2
1.414 (2 )( fCUTOFF )(R1) 0.707 2 )( fCUTOFF )( R1) (
R6 2k RG R8 2k V- R5 2k VIN2 C3 15pF
where C1 and C2 are in farads.
C1 22pF
1/2 AD8620
U1
+13V
VIN
R2 1k C2 10pF
5
R2 10k
R1 10k C2 11pF
AD8610
U1
VOUT
Figure 28. High Speed Instrumentation Amplifier
High Speed Filters
The four most popular configurations are Butterworth, Elliptical, Bessel, and Chebyshev. Each type has a response that is optimized for a given characteristic as shown in Table II.
-13V
Figure 29. Second-Order Low-Pass Filter
Table II. Filter Types
Type Butterworth Chebyshev Elliptical Bessel (Thompson)
Sensitivity Moderate Good Best Poor
Overshoot Good Moderate Poor Best
Phase Nonlinear Linear
Amplitude (Pass Band) Max Flat Equal Ripple Equal Ripple
REV. D
-15-
AD8610/AD8620
High Speed, Low Noise Differential Driver
The AD8620 is a perfect candidate as a low noise differential driver for many popular ADCs. There are also other applications, such as balanced lines, that require differential drivers. The circuit of Figure 30 is a unique line driver widely used in industrial applications. With 13 V supplies, the line driver can deliver a differential signal of 23 V p-p into a 1 k load. The high slew rate and wide bandwidth of the AD8620 combine to yield a full power bandwidth of 145 kHz while the low noise front end produces a referred-toinput noise voltage spectral density of 6 nV/Hz. The design is a transformerless, balanced transmission system where output common-mode rejection of noise is of paramount importance. Like the transformer-based design, either output can be shorted to ground for unbalanced line driver applications without changing the circuit gain of 1. This allows the design to be easily set to noninverting, inverting, or differential operation.
U2
3
R4 3 V+ 1k R8 6 AD8610 0 1k
V+
1 R10 50 R13 1k R5 1k R6 10k R7 1k
VO1
2
V- 1/2 OF AD8620
R1 1k
2
V-
R12 1k
R9
R3 1k
1k
5
V+
7
6 U3 V-
1/2 OF AD8620
R2 1k
R11 50
VO2
VO2 - VO1 = V IN
0
Figure 30. Differential Driver
-16-
REV. D
AD8610/AD8620
OUTLINE DIMENSIONS 8-Lead Mini Small Outline Package [MSOP] (RM-8)
Dimensions shown in millimeters
8-Lead Standard Small Outline Package [SOIC] Narrow Body (R-8)
Dimensions shown in millimeters and (inches)
3.00 BSC
5.00 (0.1968) 4.80 (0.1890)
5
8
3.00 BSC
1 4
4.90 BSC
8
5 4
4.00 (0.1574) 3.80 (0.1497)
1
6.20 (0.2440) 5.80 (0.2284)
PIN 1 0.65 BSC 0.15 0.00 0.38 0.22 COPLANARITY 0.10 1.10 MAX 8 0 0.80 0.60 0.40 0.25 (0.0098) 0.10 (0.0040) COPLANARITY SEATING 0.10 PLANE 1.27 (0.0500) BSC 1.75 (0.0688) 1.35 (0.0532) 8 0.25 (0.0098) 0 0.17 (0.0067) 0.50 (0.0196) 0.25 (0.0099) 45
0.23 0.08 SEATING PLANE
0.51 (0.0201) 0.31 (0.0122)
1.27 (0.0500) 0.40 (0.0157)
COMPLIANT TO JEDEC STANDARDS MO-187AA
COMPLIANT TO JEDEC STANDARDS MS-012AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
REV. D
-17-
AD8610/AD8620 Revision History
Location 2/04--Data Sheet changed from REV. C to REV. D. Page
Changes to SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Changes to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
10/02--Data Sheet changed from REV. B to REV. C.
Updated ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Edits to Figure 15 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
5/02--Data Sheet changed from REV. A to REV. B.
Addition of part number AD8620 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Universal Addition of 8-Lead SOIC (R-8 Suffix) Drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Changes to GENERAL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Additions to SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Change to ELECTRICAL SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Additions to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Replace TPC 29 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Add Channel Separation Test Circuit Figure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Add Channel Separation Graph . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Changes to Figure 26 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Addition of High-Speed, Low Noise Differential Driver section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Addition of Figure 30 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
-18-
REV. D
-19-
-20-
C02730-0-2/04(D)


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